hikey: clean dcache for SRAM after initialized
authorHaojian Zhuang <[email protected]>
Mon, 29 Jan 2018 03:42:42 +0000 (11:42 +0800)
committerHaojian Zhuang <[email protected]>
Mon, 5 Mar 2018 01:51:33 +0000 (09:51 +0800)
Although SRAM is initialized, DCACHE should be cleaned too.
Because MCU is a parrallel core to access SRAM. We need to make
sure that initialized value is really written to SRAM before
MCU using it.

Signed-off-by: Haojian Zhuang <[email protected]>
plat/hisilicon/hikey/hikey_bl2_setup.c

index 810f6aaa0255ae8f202977a446aefe585d3cfb94..6080f84f2fd7138db435b34b1d0a0fda8c82179a 100644 (file)
@@ -276,6 +276,7 @@ void bl2_early_platform_setup(meminfo_t *mem_layout)
 
        /* Clear SRAM since it'll be used by MCU right now. */
        memset((void *)SRAM_BASE, 0, SRAM_SIZE);
+       clean_dcache_range(SRAM_BASE, SRAM_SIZE);
 
        sp804_timer_init(SP804_TIMER0_BASE, 10, 192);
        dsb();